人才招聘

联系人:   余女士

电   话:   0755-86529920

邮   箱:   hr@jetio.com.cn

FPGA/ASIC Frontend Design Engineering

Skills:

  1. Good written and verbal communication skills.

  2. Good programming skills in C/C++ and Verilog/SystemVerilog.

  3. Good command of algorithms and data structures,synchronous digital design principles and parallel computer architecture.

  4. Good experience with standard industry EDA tools such as Vivado / Synopsys / Cadence.

  5. Experience with any of the AXI/DDR/PCIe/Ethernet/RDMA/ONFI/Toggle bus protocols a plus.

  6. Knowledge in any of the channel coding, machine/deep learning, database algorithms a plus.

  7. Quick learning and self-motivated.

  8. Good team player and willing to work under pressure.

Responsibility:

Junior (3 Year +) :

  1. Communicate and understand module level specification.

  2. Write module level design document according to design specification .

  3. Use RTL/HLS/OpenCL design flow (as appropriate) for module level development.

  4. Write module-level testbench as unit tests and perform functional verfication.

  5. Design space exploration and design optimization.

  6. Board level tests.

Senior(5 Year+):

  1. Same as Junior.

  2. Independent project management executing the full cycle of project development.

  3. Architecture design and specification, design, and test plan documentation.

Hardware Engineering

Skills:

  1. Good written and verbal communication skills.

  2. Experienced with industry standard PCB EDA tools, including schematic entry, layout, signal and power integrity tools.

  3. Good knowledge of high-speed circuit design.

  4. Good knowledge of power supply design, power distribution network design.

  5. Independant project management experience a plus.

  6. Good team player and willing to work under pressure.

Responsibility:

Senior(5 Year+):

  1. Requirement analysis and feasibility analysis.

  2. Write specification after key component selection.

  3. Drive key subcircuit design and write design documents.

  4. Work with schematic / layout / PI / SI engineers and drive for project completion on schedule.

  5. Coordinate with provider for thermal and enclosure design.

Software R&D Engineering

Skills:

  1. Good written and verbal communication skills.

  2. Good programming skills in C/C++.

  3. Good experience with development tools such as Make, Git.

  4. Good command of algorithms and data structures.

  5. Good command of distributed systems and operating system knowledge. Hands-on kernel programming experienc a plus.

  6. Quick learning and self-motivated.

  7. Good team player and willing to work under pressure.

  8. Experience with storage software (e.g., ceph, gluster, lustre, fuse) a plus.

Responsibility:

Junior (3 Year +) :

  1. Infrastructure software development in the area of software defined storage, or high-speed networking, or SSD/ acclerator device drivers.

  2. Software porting of infrastructure software to non-x86 CPU architectures such as ARM and Power.

  3. Performance optimization of infrasturcture software.

Senior(5 Year+):

  1. Same as Junior.

  2. Independent project management executing the full cycle of project development.

  3. Architecture design and documentation.

Software QA and Performance Engineering

Skills:

  1. Good written and verbal communication skills.

  2. Experienced with debug tools, such as gdb and valgrind.

  3. Familiar with perf, systemtap,eBPF and/or rr.

  4. Deployment experience with CI framework, e.g. Jenkins and etc. will be a plus.

  5. Quick learning and self-motivated.

  6. Good team player and willing to work overtime and under pressure.

Responsibility:

Junior (3 Year +) :

  1. Ensure software to be tested properly and delivered to customer and internal engineering teams on time.

  2. Develop manual and automated test suites to ensure compliance to product specification and adequate test coverage.

  3. Execute test plans, analyze test results and drive issues to closure.

  4. Identify and Investigate defects, provide diagnostic support to customers and internal engineering teams.

  5. Performance analysis of software product with instrumentation tools.

Senior(5 Year+):

  1. Same as Junior.

  2. Independent project management executing the full cycle of project validation.

  3. Test plan development and documentation.

  4. Development of advanced validation and verification tools and flow.

Solution Architect / DevOp Engineer

Skills:

  1. Good written and verbal communication skills.

  2. Proficiency in Bash, Python, JavaScript, and web frontend/backend development frameworks.

  3. Experience in virtualization technologies, centralized networking, and security management. Experience with NVMe-oF, RDMA, and RoCEv2would be a plus.

  4. Proficiency in Linux Performance benchmarking, cluster monitoring and analysis tools.(Experience with equivalent Windows tool would be a plus)

  5. Experience in deploying Dockerized applications using orchestration tools. Experience in deploying software defined storage, such as Ceph, Sheepdog, a plus.Experience in deploying Big Data system, such as Hadoop, Spark, etc would be a plus.

  6. - Experience with deployment of cloud-scale continuous integration/deployment (CI/CD).

  7. Quick learning and self-motivated.

  8. Good team player and willing to work under pressure. Able to communicate and influence world-wide team.

Responsibility:

Junior (3 Year +) :

  1. Quantify bottleneck for Big Data system and Software Defined Storage system.

  2. Characterize Big Data system and Software Defined Storage workload, and build workload emulator with analytical model.

  3. Develop and troubleshoot applications in cloud and virtualized environments.

  4. Develop Workflows for Big Data Systems based on customer requests.

Senior(5 Year+):

  1. Same as Junior.

  2. Develop operational tool for Heterogeneous computing cluster with FPGA computation accelerators, and next generation SSDs.

  3. Integrate FPGA accelerator hardware statistics with open source system monitoring system.

  4. POC system design and deployment with cutting-edge FPGA accelerator and SSDs.

  5. Automate POC system deployment.